ROCK Memory Map

(based on the ROCK manual of A. Aloisio (INFN Napoli) )
The ROCK's Memory Map is divided in three main pages: From the system point of view, each ROCK occupies 256 adjacent bytes, stating from offset 0x00.

See also the register list.

INTERNAL page

INTERNAL page contains 8 8-bit registers starting from offset +0x20.
Registers are aligned on odd bytes (+0x21, +0x23, ...), but can also be addressed in word fashion on each even boundary (+0x20, +0x22, ...).

The INTERNAL registers are:

INFO page

INFO page contains 4 16-bit registers starting from offset +0x30.
Registers aligned on even boundary (+0x30, +0x32, ...).

The INFO registers are:

Link operation:

Link mode is activated by reading TNOW. This will automaticaly put the QTRG of the same time as PTRG in a reg to be read at the next read of TQUE.

If the next operation is a read of TQUE, LINK is asserted (LOW) indicating that this QTRG is really linked to the previous read PTRG.

If anything else is read after TNOW, the link circuity is void and reset.

Attention: INFO page need to be reset at power-up.
See Reset for details.

FIFO page

FIFO page contains 2 32-bit registers starting from offset +0x00.
Registers are aligned on 16-byte boundary (+0x00, +0x10).

The FIFO registers are:

Both FIFO registers can be read in BLT though the VME. However, EFIFO is always faster than DFIFO.

DFIFO and EFIFO banks are 16kx27 bit deep each. Future expansion to 32kx27 bit is possible.

Reading an empty FIFO is not allowed. If user try to read an empty FIFO, one of the following happens:

  1. If BOE is asserted (LOW), a BERR is generated on the VME. In This way, a BLT transaction can be aborted when FIFO buffer is empty.
  2. If BOE is not asserted (HIGH), NVD is set to true (LOW) signifying that all the other bits are meaningless and should be discarded. (random values)
Attention: FIFO page need to be reset at power-up.
See Reset for details.

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Send comments to: Igor Sfiligoi
Created:21.1.1997
Last modified:29.1.1997