/**************************************************************/
/* */
/* File : tshard.h */
/* Description : Trigger Supervisor hardware base access */
/* */
/* Author: Enrico Graziani */
/* */
/* Created : 29.05.1997 */
/* */
/**************************************************************/
#ifndef TSHARD_H
#define TSHARD_H
#define D32 /* D32 read only on TS */
/* #define BS */ /* byte swapping BIG ENDIAN -> LITTLE ENDIAN, temporary version */
#define TSH_START_RUN 0x7812
#define TSH_STOP_RUN 0x0
/************************************************/
/* */
/* The result should be TSH_ERROR_OK, */
/* else there have been an error */
/* (see TSH_ERROR_.. constants) */
/* if not stated otherwise */
/* */
/************************************************/
#define TSH_ERROR_OK 0 /* MUST be 0 */
#define TSH_ERROR_TEST -1
#define TSH_ERROR_UNKNOWN -10
/*********************************************************************/
/* REGISTER AND COUNTER OFFSETS */
/* DO NOT USE DIRECTLY IF NOT REALLY NECESSARY */
/*********************************************************************/
/* INTERNAL REGISTERS (16 bit) */
#define TSH_INTID_ofs 0x00 /* R/W */
#define TSH_INTLEVEL_ofs 0x04 /* R/W */
#define TSH_STATUS_ofs 0x08 /* R/W */
#define TSH_INTMASK_ofs 0x0C /* R/W */
#define TSH_LATCHMASK_ofs 0x10 /* R/W */
#define TSH_ERRORMASK_ofs 0x14 /* R/W */
#define TSH_WENABLE_ofs 0x18 /* R/W */
#define TSH_DELAYT2_ofs 0x20 /* R/W */
#define TSH_DELAYT1_ofs 0x24 /* R/W */
#define TSH_GOLDNUMB_ofs 0x28 /* R/W */
#define TSH_SYNCMASK_ofs 0x2C /* R/W */
#define TSH_TMODE_ofs 0x34 /* R/W */
#define TSH_RUN_ofs 0x38 /* R/W */
#define TSH_TMOUTBUSY_ofs 0x48 /* R/W */
#define TSH_TMOUTSYNCFSTART_ofs 0x4C /* R/W */
#define TSH_TMOUTSYNCFEND_ofs 0x50 /* R/W */
/* COUNTERS OFFSETS 16 bit */
#define TSH_T2BUSY_ofs 0x6C /* R/W */
#define TSH_TMBUSY_ofs 0x70 /* R/W */
/* COUNTERS OFFSETS 24 bit */
#define TSH_DEADTIME_ofs 0x40 /* R/W */
#ifdef BS
#define TSH_ACTIVETIME_ofs 0x44 /* R/W */
#else
#define TSH_ACTIVETIME_ofs 0x30 /* R/W */
#define TSH_RESETTIME_ofs 0x44 /* R/W */
#define TSH_READTIME_ofs 0x40 /* R/W */
#endif
#define TSH_T1RATE_ofs 0x64 /* R */
#define TSH_T2RATE_ofs 0x68 /* R */
/* COUNTERS OFFSETS 32 bit */
#define TSH_TRGCOUNTER_ofs 0x3C /* R/W */
#define TSH_T1COUNT_ofs 0x60 /* R/W */
/*********************************************************************/
/* TS hard id type */
/*********************************************************************/
typedef struct
{
int cid; /* VME channel id */
int type; /* TS of A or B type */
int slot; /* VME slot */
unsigned int vme_addr; /* VME address */
unsigned int vme_am; /* VME am */
unsigned int offs; /* TS offs */
void *map_ptr; /* VME map pointer */
} TSH_id_base;
typedef TSH_id_base *TSH_id;
/*********************************************************************/
/* readpage types */
/*********************************************************************/
typedef struct
{
unsigned short status;
unsigned short run;
unsigned int trgcnt;
unsigned int deadcnt;
unsigned int actcnt;
unsigned int t1cnt;
unsigned int t1rate;
unsigned int t2rate;
unsigned short t2busy;
unsigned short tmbusy;
} TSH_STATUS_adds;
typedef struct
{
unsigned short intid;
unsigned char intlevel;
unsigned short intmask;
unsigned short latchmask;
unsigned short errormask;
unsigned short delayt1;
unsigned short goldnumb;
unsigned short syncmask;
unsigned short tmoutbusy;
unsigned short tmoutsyncfstart;
unsigned short tmoutsyncfend;
} TSH_SET_adds;
/*********************************************************************/
/* Query routines */
/*********************************************************************/
/* returns 0 if TS not present, 1 else */
int tsh_ispresent(int type); /* IN, TS type (A or B) */
int tsh_ispresent_slot(int slot, int type); /* IN slot IN, TS type (A or B) */
/*********************************************************************/
/* Initialization routines */
/*********************************************************************/
int tsh_open(int type, /* IN, TS type (A or B) */
TSH_id *ts_id); /* OUT */
int tsh_close(int type, /* IN, TS type (A or B) */
TSH_id ts_id); /* IN */
/*********************************************************************/
/* read routines */
/* return the read value */
/*********************************************************************/
unsigned short tsh_reg16_bs (unsigned short reg); /* IN */
unsigned int tsh_reg24_bs (unsigned int reg); /* IN */
unsigned int tsh_reg32_bs (unsigned int reg); /* IN */
unsigned int tsh_reg32_lebs (unsigned int reg); /* IN */
/**********************************/
/* Generic */
/* Do not use directly */
/**********************************/
unsigned short tsh_read_reg16(TSH_id ts_id, /* IN */
unsigned int offset); /* IN */
unsigned int tsh_read_reg24(TSH_id ts_id, /* IN */
unsigned int offset); /* IN */
unsigned int tsh_read_reg32(TSH_id ts_id, /* IN */
unsigned int offset); /* IN */
/**********************************/
/* Use this */
/**********************************/
/* internal registers 16 bits */
#ifdef BS
#define tsh_read_intid(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16_lebs(ts_id,TSH_INTID_ofs)
#define tsh_read_intlevel(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16_lebs(ts_id,TSH_INTLEVEL_ofs)
#define tsh_read_status(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16_lebs(ts_id,TSH_STATUS_ofs)
#define tsh_read_intmask(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16_lebs(ts_id,TSH_INTMASK_ofs)
#define tsh_read_latchmask(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16_lebs(ts_id,TSH_LATCHMASK_ofs)
#define tsh_read_errormask(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16_lebs(ts_id,TSH_ERRORMASK_ofs)
#else
#define tsh_read_intid(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_INTID_ofs)
#define tsh_read_intlevel(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_INTLEVEL_ofs)
#define tsh_read_status(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_STATUS_ofs)
#define tsh_read_intmask(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_INTMASK_ofs)
#define tsh_read_latchmask(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_LATCHMASK_ofs)
#define tsh_read_errormask(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_ERRORMASK_ofs)
#define tsh_read_wenable(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_WENABLE_ofs)
#endif
#ifndef BS
#define tsh_read_delayt2(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_DELAYT2_ofs)
#endif
#define tsh_read_delayt1(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_DELAYT1_ofs)
#define tsh_read_goldnumb(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_GOLDNUMB_ofs)
#ifdef BS
#define tsh_read_syncmask(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_SYNCMASK_ofs)
#else
#define tsh_read_syncmask(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg32(ts_id,TSH_SYNCMASK_ofs)
#endif
#define tsh_read_tmode(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_TMODE_ofs)
#define tsh_read_run(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_RUN_ofs)
#define tsh_read_tmoutbusy(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_TMOUTBUSY_ofs)
#define tsh_read_tmoutsyncfstart(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_TMOUTSYNCFSTART_ofs)
#define tsh_read_tmoutsyncfend(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_TMOUTSYNCFEND_ofs)
/* counters 16 bits */
#define tsh_read_t2busy(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_T2BUSY_ofs)
#define tsh_read_tmbusy(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_TMBUSY_ofs)
/* counters 24 bits */
#ifdef BS
#define tsh_read_deadtime(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg24(ts_id,TSH_DEADTIME_ofs)
#define tsh_read_activetime(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg24(ts_id,TSH_ACTIVETIME_ofs)
#else
#define tsh_read_deadtime(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg32(ts_id,TSH_DEADTIME_ofs)
#define tsh_read_activetime(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg32(ts_id,TSH_ACTIVETIME_ofs)
#endif
#ifdef BS
#define tsh_read_t1rate(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg24(ts_id,TSH_T1RATE_ofs)
#define tsh_read_t2rate(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg24(ts_id,TSH_T2RATE_ofs)
#else
#define tsh_read_t1rate(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_T1RATE_ofs)
#define tsh_read_t2rate(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg16(ts_id,TSH_T2RATE_ofs)
#endif
/* counters 32 bits */
#define tsh_read_trgcounter(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg32(ts_id,TSH_TRGCOUNTER_ofs)
#define tsh_read_t1count(/*TSH_id*/ ts_id) /* IN */ \
tsh_read_reg32(ts_id,TSH_T1COUNT_ofs)
/*********************************************************************/
/* write routines */
/*********************************************************************/
unsigned short tsh_write_reg16(TSH_id ts_id, /* IN */
unsigned int offset, /* IN */
unsigned short reg, /* IN */
unsigned short testmask); /* IN, test if>0 */
unsigned int tsh_write_reg24(TSH_id ts_id, /* IN */
unsigned int offset, /* IN */
unsigned int reg, /* IN */
unsigned int testmask); /* IN, test if>0 */
unsigned int tsh_write_reg32(TSH_id ts_id, /* IN */
unsigned int offset, /* IN */
unsigned int reg, /* IN */
unsigned int testmask); /* IN, test if>0 */
/* internal page */
#ifdef BS
#define tsh_write_intid(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ intid, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16_lebs(ts_id,TSH_INTID_ofs,intid,test*0xffff)
#define tsh_write_intlevel(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ intlevel, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16_lebs(ts_id,TSH_INTLEVEL_ofs,intlevel,test*0xffff)
#define tsh_write_status(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ status, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16_lebs(ts_id,TSH_STATUS_ofs,status,test*0xffff)
#define tsh_write_intmask(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ intmask, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16_lebs(ts_id,TSH_INTMASK_ofs,intmask,test*0xffff)
#define tsh_write_latchmask(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ latchmask, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16_lebs(ts_id,TSH_LATCHMASK_ofs,latchmask,test*0xffff)
#define tsh_write_errormask(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ errormask, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16_lebs(ts_id,TSH_ERRORMASK_ofs,errormask,test*0xffff)
#else
#define tsh_write_intid(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ intid, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_INTID_ofs,intid,test*0xffff)
#define tsh_write_intlevel(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ intlevel, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_INTLEVEL_ofs,intlevel,test*0xffff)
#define tsh_write_status(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ status, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_STATUS_ofs,status,test*0xffff)
#define tsh_write_intmask(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ intmask, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_INTMASK_ofs,intmask,test*0xffff)
#define tsh_write_latchmask(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ latchmask, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_LATCHMASK_ofs,latchmask,test*0xffff)
#define tsh_write_errormask(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ errormask, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_ERRORMASK_ofs,errormask,test*0xffff)
#define tsh_write_wenable(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ wenable, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_WENABLE_ofs,wenable,test*0xffff)
#endif
#ifndef BS
#define tsh_write_delayt2(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ delayt2, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_DELAYT2_ofs,delayt2,test*0xffff)
#endif
#define tsh_write_delayt1(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ delayt1, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_DELAYT1_ofs,delayt1,test*0xffff)
#define tsh_write_goldnumb(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ goldnumb, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_GOLDNUMB_ofs,goldnumb,test*0xffff)
#ifdef BS
#define tsh_write_syncmask(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ syncmask, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_SYNCMASK_ofs,syncmask,test*0xffff)
#else
#define tsh_write_syncmask(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ syncmask, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg32(ts_id,TSH_SYNCMASK_ofs,syncmask,test*0xffffffff)
#endif
#define tsh_write_tmode(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ tmode, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_TMODE_ofs,tmode,test*0xffff)
#define tsh_write_run(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ run, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_RUN_ofs,run,test*0xffff)
#define tsh_write_tmoutbusy(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ tmoutbusy, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_TMOUTBUSY_ofs,tmoutbusy,test*0xffff)
#define tsh_write_tmoutsyncfstart(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ tmoutsyncfstart, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_TMOUTSYNCFSTART_ofs,tmoutsyncfstart,test*0xffff)
#define tsh_write_tmoutsyncfend(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ tmoutsyncfend, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_TMOUTSYNCFEND_ofs,tmoutsyncfend,test*0xffff)
/* counters 16 bits */
#define tsh_write_t2busy(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ t2busy, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_T2BUSY_ofs,t2busy,test*0xffff)
#define tsh_write_tmbusy(/*TSH_id */ ts_id, /* IN */ \
/*unsigned short */ tmbusy, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg16(ts_id,TSH_TMBUSY_ofs,tmbusy,test*0xffff)
/* counters 24 bits */
#ifdef BS
#define tsh_write_deadtime(/*TSH_id */ ts_id, /* IN */ \
/*unsigned int */ deadtime, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg24(ts_id,TSH_DEADTIME_ofs,deadtime,test*0xffff)
#define tsh_write_activetime(/*TSH_id */ ts_id, /* IN */ \
/*unsigned int */ activetime, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg24(ts_id,TSH_ACTIVETIME_ofs,activetime,test*0xffff)
#else
#define tsh_write_deadtime(/*TSH_id */ ts_id, /* IN */ \
/*unsigned int */ deadtime, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg32(ts_id,TSH_DEADTIME_ofs,deadtime,test*0xffff)
#define tsh_write_activetime(/*TSH_id */ ts_id, /* IN */ \
/*unsigned int */ activetime, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg32(ts_id,TSH_ACTIVETIME_ofs,activetime,test*0xffff)
#define tsh_write_readtime(/*TSH_id */ ts_id, /* IN */ \
/*unsigned int */ activetime, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg32(ts_id,TSH_READTIME_ofs,activetime,test*0xffff)
#define tsh_write_resettime(/*TSH_id */ ts_id, /* IN */ \
/*unsigned int */ activetime, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg32(ts_id,TSH_RESETTIME_ofs,activetime,test*0xffff)
#endif
/* counters 32 bits */
#define tsh_write_trgcounter(/*TSH_id */ ts_id, /* IN */ \
/*unsigned int */ trgcounter, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg32(ts_id,TSH_TRGCOUNTER_ofs,trgcounter,test*0xffff)
#define tsh_write_t1count(/*TSH_id */ ts_id, /* IN */ \
/*unsigned int */ t1count, /* IN */ \
/*char */ test) /* IN, bool */ \
tsh_write_reg32(ts_id,TSH_T1COUNT_ofs,t1count,test*0xffff)
/*********************************************************************/
/* readpage routines */
/* internal. Do not use this */
/*********************************************************************/
int tsh_readpage_i_status(TSH_id ts_id, /* IN */
TSH_STATUS_adds *status); /* OUT */
int tsh_readpage_i_set(TSH_id ts_id, /* IN */
TSH_SET_adds *set); /* OUT */
/****************/
/* Use this */
/****************/
#define tsh_readpage_status(/*TSH_id */ ts_id, /* IN */ \
/*TSH_STATUS_adds */ status) /* OUT */ \
tsh_readpage_i_status(ts_id,&(status))
#define tsh_readpage_set(/*TSH_id */ ts_id, /* IN */ \
/*TSH_SET_adds */ set) /* OUT */ \
tsh_readpage_i_set(ts_id,&(set))
/*********************************************************************/
/* writepage routines */
/* internal. Do not use this */
/*********************************************************************/
int tsh_writepage_i_status(TSH_id ts_id, /* IN */
TSH_STATUS_adds *status); /* OUT */
int tsh_writepage_i_set(TSH_id ts_id, /* IN */
TSH_SET_adds *set); /* OUT */
/****************/
/* Use this */
/****************/
#define tsh_writepage_status(/*TSH_id */ ts_id, /* IN */ \
/*TSH_STATUS_adds */ status) /* OUT */ \
tsh_writepage_i_status(ts_id,&(status))
#define tsh_writepage_set(/*TSH_id */ ts_id, /* IN */ \
/*TSH_SET_adds */ set) /* OUT */ \
tsh_writepage_i_set(ts_id,&(set))
#endif /* TSHARD_H */